The sinusoidal ac source in the figure has an rms value of $\frac{20}{\sqrt{2}}$ V. Considering all possible values of R_{L}, the minimum value of R_{S} in Ω to avoid burnout of the Zener diode is _________.
Assuming the diodes to be ideal in the figure, for the output to be clipped, the input voltage v_{i} must be outside the range
A 10 kHz even-symmetric square wave is passed through a bandpass filter with centre frequency at 30 kHz and 3 dB passband of 6 kHz. The filter output is
In the circuit shown below, the knee current of the ideal Zener diode is 10 mA. To maintain 5 V across R_{L}, the minimum value of R_{L} in $\Omega $ and the minimum power rating of the Zener diode in mW respectively are
A voltage $1000\mathrm{sin}\omega t$ Volts is applied across YZ. Assuming ideal diodes, the voltage measured across WX in Volts is
The i-v characteristics of the diode in the circuit given below are
The current in the circuit is
The transistor used in the circuit shown below has a β of 30 and I_{CBO} is negligible
If the forward voltage drop of diode is 0.7V, then the current through collector will be
A clipper circuit is shown below.
Assuming forward voltage drops of the diodes to be 0.7 V, the input-output transfer characteristics of the circuit is
Figure shows a composite switch consisting of a power transistor (BJT) in series with a diode. Assuming that the transistor switch and the diode are ideal, the I-V characteristic of the composite switch is
The equivalent circuits of a diode, during forward biased and reverse biased conditions, are shown in the figure.
If such a diode is used in clipper circuit of figure given above, the output voltage V_{0} of the circuit will be(A)(A)
(A)
(B)
(C)
(D)
Two perfectly matched silicon transistor are connected as shown in the figure. Assuming the β of the transistors to be very high and the forward voltage drop in diodes to be 0.7 V, the value of current I is
In the voltage doubler circuit shown in the figure, the switch ‘S ’ is closed at t = 0. Assuming diodes D_{1} and D_{2} to be ideal, load resistance to be infinite and initial capacitor voltages to be zero. The steady state voltage across capacitors C_{1} and C_{2} will be