# GATE Questions & Answers of Combinational Circuits

## What is the Weightage of Combinational Circuits in GATE Exam?

Total 21 Questions have been asked from Combinational Circuits topic of Digital circuits subject in previous GATE papers. Average marks 1.67.

Consider the circuit shown in the figure. The Boolean expression F implemented by the circuit is

Figure I shows a 4-bit ripple carry adder realized using full adders and Figure II shows the circuit of a full-adder (FA). The propagation delay of the XOR, AND and OR gates in Figure II are 20 ns, 15 ns and 10 ns, respectively. Assume all the inputs to the 4-bit adder are initially reset to 0. At t = 0, the input to the 4-bit adder are changed to XXXX= 1100, YYYY= 0100 and Z= 1. The output of the ripple carry adder will be stable at t (in ns)=____________

A programmable logic array (PLA) is shown in the figure. The Boolean function F implements is

The output of the combinational circuit given below is Identify the circuit below. The functionality implemented by the circuit below is A 4:1 multiplexer is to be used for generating the output carry of a full adder. A and B are the bits to be added while Cin is the input carry and Cout is the output carry. A and B are to be used as the select bits with A being the more significant select bit. Which one of the following statements correctly describes the choice of signals to be connected to the inputs I0, I1, I2 and I3 so that the output is Cout?

For the circuit shown in the figure, the delays of NOR gates, multiplexers and inverters are 2 ns,1.5 ns and 1 ns, respectively. If all the inputs P, Q, R, S and T are applied at the same time instant, the maximum propagation delay (in ns) of the circuit is __________ A 1-to-8 demultiplexer with data input Din, address inputs S0, S1, S2 (with S0 as the LSB) and as the eight demultiplexed outputs, is to be designed using two 2-to-4 decoders (with enable input $\overline{)\mathrm{E}}$ and address inputs A0 and A1) as shown in the figure. Din, S0, S1 and S2 are to be connected to P,Q,R and S , but not necessarily in this order. The respective input connections to P,Q,R and S terminals should be In a half-subtractor circuit with X and Y as inputs, the Borrow (M) and Difference (N = X - Y) are given by

Consider the multiplexer based logic circuit shown in the figure. Which one of the following Boolean functions is realized by the circuit?

In the circuit shown, W and Y are MSBs of the control inputs. The output F is given by An 8-to-1 multiplexer is used to implement a logical function Y as shown in the figure. The output Y is given by The output Y of a 2-bit comparator is logic 1 whenever the 2-bit input A is greater than the 2-bit input B. The number of combinations for which the output is logic 1, is

The logic function implemented by the circuit below is (ground implies a logic "0") The Boolean function realized by the logic circuit shown is What are the minimum number of 2-to-1 multiplexers required to generate a 2-input AND gate and a 2-input Ex-OR gate?

Two products are sold from a vending machine, which has two push buttons P1 and P2. When a button is pressed, the price of the corresponding product is displayed in a 7-segment display.
If no buttons are pressed, ‘0’ is displayed, signifying ‘Rs. 0’.
If only P1 is pressed, ‘2’ is displayed, signifying ‘Rs. 2’.
If only P2 is pressed, ‘5’ is displayed, signifying ‘Rs. 5’.
If both P1 and P2 are pressed, ‘E’ is displayed, signifying ‘Error’.
The names of the segments in the 7-segment display, and the glow of the display for ‘0’, ‘2’, ‘5’ and ‘E’, are shown below Consider
(i) push button pressed/not pressed is equivalent to logic 1/0 respectively
(ii) a segment glowing / not glowing in the display is equivalent to logic 1/0 respectively

If segments a to g are considered as functions of P1 and P2, then which of the following is correct?

Two products are sold from a vending machine, which has two push buttons P1 and P2. When a button is pressed, the price of the corresponding product is displayed in a 7-segment display.
If no buttons are pressed, ‘0’ is displayed, signifying ‘Rs. 0’.
If only P1 is pressed, ‘2’ is displayed, signifying ‘Rs. 2’.
If only P2 is pressed, ‘5’ is displayed, signifying ‘Rs. 5’.
If both P1 and P2 are pressed, ‘E’ is displayed, signifying ‘Error’.
The names of the segments in the 7-segment display, and the glow of the display for ‘0’, ‘2’, ‘5’ and ‘E’, are shown below Consider
(i) push button pressed/not pressed is equivalent to logic 1/0 respectively
(ii) a segment glowing / not glowing in the display is equivalent to logic 1/0 respectively

What are the minimum numbers of NOT gates and 2-input OR gates required to design the logic of the driver for this 7-segment display?

For the circuit shown in the following figure I0-I3 are inputs to the 4:1 multiplexer R(MSB) and S are control bits The output Z can be represented by 