GATE Questions & Answers of Analog Circuits Electronics and Communication Engg

In the circuit shown below, the op-amp is ideal and Zener voltage of the diode is 2.5 volts. At the input, unit step voltage is applied, i.e. $\style{font-family:'Times New Roman'}{\nu_{IN}(t)=u(t)}$ volts. Also, at t = 0, the voltage across each of the capacitors is zero.
The time $\style{font-family:'Times New Roman'}t$, in milliseconds, at which the output voltage $v_{OUT}$ crosses −10 V is

A good transimpedance amplifier has

The circuit shown in the figure is used to provide regulated voltage (5 V) across the 1k$\Omega$ resistor. Assume that the Zener diode has a constant reverse breakdown voltage for a current range, starting from a minimum required Zener current, $ I_{Zmin}=2 $ mA to its maximum allowable current. The input voltage $ V_1 $ may vary by 5% from its nominal value of 6 V. The resistance of the diode in the breakdown region is negligible.

The value of $R$ and the minimum required power dissipation rating of the diode, respectively, are

A dc current of 26 $\mu$A flows through the circuit shown. The diode in the circuit is forward biased and it has an ideality factor of one. At the quiescent point, the diode has a junction capacitance of 0.5 nF . Its neutral region resistances can be neglected. Assume that the room temperature thermal equivalent voltage is 26 mV.

For $ \omega=2\times10^6 $ rad/s , the amplitude of the small-signal component of diode current (in  $\mu$A, correct to one decimal place) is _______.

An op-amp based circuit is implemented as shown below.

In the above circuit, assume the op-amp to be ideal. The voltage (in volts, correct to one decimal place) at node A, connected to the negative input of the op-amp as indicated in the figure is _________.

For a narrow base PNP BJT, the excess minority carrier concentration ($\triangle n_E$ for emitter,$\triangle p_B$ for base,$\triangle n_C$ for collector) normalized to equilibrium minority carrier concentration ($n_{E0}$ for emitter,$n_{B0}$ for base,$n_{C0}$ for collector) in the quasi-neutral emitter, base and collector regions are shown below. Which one of the following biasing modes is the transistor operating in?


For the operational amplifier circuit shown, the output saturation voltages are ±15V. The upper and lower threshold voltages for the circuit are, respectively,

A good transconductance amplifier should have

A Miller effect in the context of a Common Emitter amplifier explains

In the figure shown, the npn transistor acts as a switch.

For the input Vin(t) as shown in figure, the transistor switches between the cut-off and saturation regions of operation, when T is large. Assume collector-to-emitter voltage at saturation VCE(sat)=0.2V and base-to-emitter voltage VBE(sat)=0.7V. The minimum value of the common-base current gain($\alpha$) of the transistor for the switching should be___________.

For the circuit, assume that the NMOS transistor. Its threshold voltage Vtn=1 V and its transconductance parameter μnCoxWL=1 mA/V2. Neglect channel length modulation and body bias effect. Under these conditions, the drain current ID in mA is_____________.

For the DC analysis of the Common-Emitter amplifier shown, neglect the base current ans assume that the emitter and collector currents are equal. Given that VT=25 mV, VBE=0.7 mV, and the BJT output resistance $\gamma_0$ is practically infinite. Under these conditions, the midband voltage gain magnitude, Av=v0/viV/V, is________.


The amplifier circuit shown in the figure is implemented using a compensated operation amplifier (op-amp), and has an open-loop voltage gain, A0=105 V/V and an open-loop cut-off frequency, fc=8 Hz. The voltage gain of the amplifier at 15 kHz, in V/V is_____________.

An n-channel enhancement mode MOSFET is biased at VGS > VTH and VDS (VGS - VTH), where VGS is the get-to-source voltage, VDS is the drain-to-source voltage and  VTH is the threshold voltage. Considering channel length modulation effect to be significant, the MOSFET behaves as a

An npn bipolar junction transistor (BJT) is opening in the active region. If the reverse bias across the base-collection junction is increased, then

Consider an n-channel MOSFET having width W, length L, electron mobility in the channel µn and oxide capacitance per unit area Cox. If gate-to-source voltage VGS = 0.7 V, drain-to-source voltage VDS = 0.1 V, (µn Cox) = 100 µA/V2, threshold voltage VTH = 0.3 V and (W/ L) = 50, then the transconductance gm(in mA/V) is_________.

The output V0 of the diode circuit shown in the figure is connected to an averaging DC voltmeter. The reading on the DC voltmeter in Volts, neglecting the voltage drop across the diode, is_________.

Consider the circuit shown in the figure. Assume base-to-emitter voltage VBE = 0.8 V and common-base current gain ($\alpha$) of the transistor is unity.


The value of the collector-to-emitter voltage VCE (in volt) is__________.

A MOS capacitor is fabricated on p-type Si (Silicon) where the metal work function is 4.1 eV and election affinity of Si is 4.0 eV. E- EF=0.9 eV, where EC and EF are the condition band minimum and the Fermi energy levels of Si, respectively. Oxide r=3.9, o=8.85 × 10-14 F/cm , oxide thickness tox=0.1 µm and electronic charge =1.6 × 10-19 C. If the measured flat band voltage of this capacitor is -1 V, then the magnitude of the fixed charge at the oxide-semiconductor interface, in nC/cm2, is_________.

Two n-channel MOSFETs, T1 and T2, are identical in all respects except that the width of T2 is double that of T1. Both the transistors are biased in the saturation region of operation, but the gate overdrive voltage (VGS-VTH) of T2 is double that of T1, where VGS and VTH are the gate-to-source voltage and threshould voltage of the transistors, respectively. If the drain current and transconduction of T1 are ID1 and gm1 respectively, the corresponding values of these two parameters for T2 are

Assuming that transistors M1 and M2 are identical and have a threshold voltage of 1 V, the state of transistors M1 and M2 are respectively


In the circuit shown, transistors Q1 and Q2 are biased at a collector current of 2.6 mA. Assuming that transistor current gains are sufficiently large to assume collector current equal to emitter current and thermal voltage of 26 mV, the magnitude of voltage gain V0V5 in the mid-band frequency range is__________ (up to second decimal place).

In the voltage reference circuit shown in the figure, the op-amp is ideal and the transistors Q1, Q2...., Q32 are identical in all respects and have infinitely large values of common-emitter current gain ($ \beta $). The collector current (Ic) of the transistors is related to their base-emitter voltage (VBE) by the relation Ic = Is exp (VBE / VT), where Is is the saturation current. Assume that the voltage VP shown in the figure is 0.7 V and the thermal voltage VT = 26 mV.



The output voltage Vout (in volts) is__________

Consider the constant current source shown in the figure below. Let β represent the current gain of the transistor.

The load current I0 through RL is

The following signal Vi of peak voltage 8 V is applied to the non-inverting terminal of an ideal opamp. The transistor has $ V_{BE}=0.7\;\mathrm V,\;\beta=100,\;V_{LED}=1.5\;\mathrm V,\;V_{CC}=10\;\mathrm V $ and $ -V_{CC}=-10\;\mathrm V $ .

The number of times the LED glows is ________

Consider the oscillator circuit shown in the figure. The function of the network (shown in dotted lines) consisting of the 100 kΩ resistor in series with the two diodes connected back-to-back is to:


An ideal opamp has voltage sources V1, V3, V5,...., VN-1 connected to the non-inverting input and V2,V4, V6,.....,VN connected to the inverting input as shown in the figure below (+VCC=15 volt,-VCC=-15 volt) The voltages V1, V2, V3, V4, V5, V6,… are 1, − 1/2, 1/3, −1/4, 1/5, −1/6, … volt, respectively. As N approaches infinity, the output voltage (in volt) is ___________


A p-i-n photodiode of responsivity 0.8A/W is connected to the inverting input of an ideal opamp as shown in the figure, +Vcc = 15 V, −Vcc = −15V, Load resistor RL = 10 kΩ. If 10 μW of power is incident on the photodiode, then the value of the photocurrent (in μA) through the load is ________


Resistor R1 in the circuit below has been adjusted so that I1 = 1 mA. The bipolar transistors Q1 and Q2 are perfectly matched and have very high current gain, so their base currents are negligible. The supply voltage Vcc is 6 V. The thermal voltage kT/q is 26 mV.


The value of R2 (in Ω) for which I2=100 μA is ________

Which one of the following statements is correct about an ac-coupled common-emitter amplifier operating in the mid-band region?

The switch S in the circuit shown has been closed for a long time. It is opened at time = 0 and remains open after that. Assume that the diode has zero reverse current and zero forward voltage drop.

The steady state magnitude of the capacitor voltage VC (in volts) is ______

The figure shows a half-wave rectifier with a 475 μF filter capacitor. The load draws a constant current IO=1 A from the rectifier. The figure also shows the input voltage Vi, the output voltage VC and the peak-to-peak voltage ripple u on VC. The input voltage Vi is a triangle-wave with an amplitude of 10 V and a period of 1 ms.

The value of the ripple u (in volts) is ________

In the opamp circuit shown, the Zener diodes Z1 and Z2 clamp the output voltage V0 to +5 V or −5 V. The switch S is initially closed and is opened at time t=0.

The time t=t1 (in seconds) at which V0 changes state is ________

An opamp has a finite open loop voltage gain of 100. Its input offset voltage Vios (= +5mV) is modeled as shown in the circuit below. The amplifier is ideal in all other respects. Vinput is 25 mV.

The output voltage (in millivolts) is ________

The diodes D1 and D2 in the figure are ideal and the capacitors are identical. The product RC is very large compared to the time period of the ac voltage. Assuming that the diodes do not breakdown in the reverse bias, the output voltage VO (in volt) at the steady state is __________


Consider the circuit shown in the figure. Assuming VBE1 = VEB2 = 0.7 volt, the value of the dc voltage VC2 (in volt) is __________


In the astable multivibrator circuit shown in the figure, the frequency of oscillation (in kHz) at the output pin 3 is __________


For the circuit shown in the figure, R1 = R2 = R3 = 1 Ω, L = 1 μH and C = 1 μF. If the input Vin = cos(106t) , then the overall voltage gain (Vout /Vin) of the circuit is __________


In the circuit shown in the figure, the channel length modulation of all transistors is non-zero λ0. Also, all transistors operate in saturation and have negligible body effect. The ac small signal voltage gain (Vo/Vin) of the circuit is


In the circuit shown in the figure, transistor M1 is in saturation and has transconductance gm = 0.01 siemens. Ignoring internal parasitic capacitances and assuming the channel length modulation λ to be zero, the small signal input pole frequency (in kHz) is __________


For the circuit with ideal diodes shown in the figure, the shape of the output (Vout) for the given sine wave input (Vin) will be

In the circuit shown, assume that the opamp is ideal. The bridge output voltage V0 (in mV) for δ = 0.05 is ____.

The circuit shown in the figure has an ideal opamp. The oscillation frequency and the condition to sustain the oscillations, respectively, are

In the circuit shown, I1 = 80 mA and I2 = 4 mA. Transistors T1 and T2 are identical. Assume that the thermal voltage VT is 26 mV at 27 oC. At 50 oC, the value of the voltage V12 = V1V2 (in mV) is _____.


If the circuit shown has to function as a clamping circuit, then which one of the following conditions should be satisfied for the sinusoidal signal of period $ T $ ?


In the circuit shown, $ V_0=V_A $ for switch SW in position $ A $ and $ V_0=V_B $ for SW in position $ B $. Assume that the opamp is ideal. The value of VOBVOA is ___________.


In the bistable circuit shown, the ideal opamp has saturation levels of ±V. The value of R1(in kΩ) that gives a hysteresis width of 500 mV is _________

The diode in the circuit given below has VON = 0.7 V but is ideal otherwise. The current (in mA) in the 4 kΩ resistor is


Assuming that the opamp in the circuit shown below is ideal, the output voltage V0 (in volts)


For the voltage regulator circuit shown, the input voltage (Vin) is 20 ± 20% and the regulated output voltage (Vout) is 10 V. Assume the opamp to be ideal. For a load RL drawing 200 mA, the maximum power dissipation in Q1 (in Watts) is __________.

In the ac equivalent circuit shown, the two BJTs are biased in active region and have identical parameters with β > > 1. The open circuit small signal voltage gain is approximately _____.

In the circuit shown in the figure, the BJT has a current gain (β) of 50. For an emitter-base voltage VEB = 600 mV, the emitter-collector voltage VEC (in Volts) is _____.


In the circuit shown using an ideal opamp, the 3-dB cut-off frequency (in Hz) is _____.

In the circuit shown, assume that diodes D1 and D2 are ideal. In the steady state condition, the average voltage Vab (in Volts) across the 0.5μF capacitor is _____.

In the circuit shown, assume that the opamp is ideal. If the gain (Vo/Vin) is –12, the value of R (in kΩ) is ____.

In the circuit shown, both the enhancement mode NMOS transistors have the following characteristics: kn=μnCoxW/L=1mA/V2;VTN=1V. Assume that the channel length modulation parameter λ is zero and body is shorted to source. The minimum supply voltage VDD (in volts) needed to ensure that transistor M1 operates in saturation mode of operation is _____.

In the circuit shown, assume that the diodes D1 and D2 are ideal. The average value of voltage Vab (in Volts), across terminals ‘a’ and ‘b’ is ______.

 A good current buffer has

In the ac equivalent circuit shown in the figure, if iin  is the input current and RF  is very large, the type of feedback is

In the low-pass filter shown in the figure, for a cut-off frequency of 5 kHz , the value of R2 (in kΩ) is _____________.

In the following circuit employing pass transistor logic, all NMOS transistors are identical with a threshold voltage of 1 V.  Ignoring the body-effect, the output voltages at P, Q and R are,

 In the voltage regulator circuit shown in the figure, the op-amp is ideal. The BJT has VBE = 0.7 V and β  = 100, and the zener voltage is 4.7 V. For a regulated output of 9 V, the value of R (in Ω) is _______.

In the circuit shown, the op-amp has finite input impedance, infinite voltage gain and zero input offset voltage. The output voltage VOUT is

 For the amplifier shown in the figure, the BJT parameters are VBE = 0.7 V, β  = 200, and thermal voltage VT  = 25 mV. The voltage gain (vo/vi) of the amplifier is _______


The feedback topology in the amplifier circuit ( the base bias circuit is not shown for simplicity) in the figure is