Explanation :
Cache memory size = N words
Block size = B words
Direct cache memory
Address binding
$ \begin{array}{l}\boxed{\;\;\mathrm{tag}\;\;}\boxed{\;\;\mathrm{LO}\;\;}\boxed{\;\;\mathrm{WO}\;\;}\\10\;\mathrm{bit}\end{array} $
When, cache is configured as 16-way set associative then set offset value decreases. So tag size increases.
$ \begin{array}{l}\boxed{\;\;\mathrm{tag}\;\;}\boxed{\;\;\mathrm{SO}\;\;}\boxed{\;\;\mathrm{WO}\;\;}\\14\;\mathrm{bit}\end{array} $
Eg., Cache memory size = 8B
Block size = 2B
MM size = 16B
(a) Direct Cache memory
$ \begin{array}{l}\boxed{\;\;\mathrm{tag}\;\;}\boxed{\;\;\mathrm{LO}\;\;}\boxed{\;\;\mathrm{WO}\;\;}\\14\;\mathrm{bit}\;\;\;2\;\mathrm{bit}\;\;\;1\;\mathrm{bit}\end{array} $
#lines $ =\frac82=4 $
(b) 2-way set associate Cache memory
#sets $ =\frac{\mathrm N}{\mathrm P-\mathrm{way}}=\frac42=2 $
$ \begin{array}{l}\boxed{\;\;\mathrm{tag}\;\;}\boxed{\;\;\mathrm{SO}\;\;}\boxed{\;\;\mathrm{WO}\;\;}\\\;2\;\mathrm{bit}\;\;\;1\;\mathrm{bit}\;\;\;\;1\;\mathrm{bit}\end{array} $